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i ntegrated c ircuits d ivision ds-cpc9909-r03 www.ixysic.com 1 cpc9909 high efficiency, off-line, high brightness led driver e 3 pb features ? 8v dc to 550v dc input voltage range ? >90% efficiency ? stable operation at >50% duty cycle ? drives multiple leds in series/parallel ? regulated led current ? linear or pwm brightness control inputs ? resistor-programmable minimum off-time ? soic-8 rohs compliant package ? buck or boost configuration applications ? flat-panel display rgb backlighting ? signage and decorative led lighting ? dc/dc or ac/dc led driver applications description the cpc9909 is a low cost, high-efficiency, offline, high-brightness (hb) led driver manufactured using ixys integrated circuits division?s high voltage bcdmos on soi process. this driver has an internal regulator that allows it to operate from 8v dc to 550v dc . this wide input operating voltage range enables the driver to be used in a broad range of hb led applications. the cpc9909 features pulse frequency modulation (pfm) with a constant peak-current control scheme. this regulation scheme is inherently stable, allowing the driver to be operated above 50% duty cycle without open loop instability or sub-harmonic oscillations. led dimming can be implemented by applying a small dc voltage to the ld pin, or by applying a low frequency pwm signal to the pwmd pin. the cpc9909 is available in a standard 8-lead soic package and a thermally enhanced 8-lead soic package with an exposed thermal pad (ep). ordering information cpc9909 block diagram part description cpc9909n soic-8 (100/tube) CPC9909NTR soic-8 tape & reel (2000/reel) cpc9909ne soic-8 ep (exposed pad) (100/tube) cpc9909netr soic-8 ep (exposed pad)tape & reel (2000/reel) v oltage reg u lator v oltage reference q trig minim u m off-time one shot s r q - + - + v dd v in ld p w md gnd cs gate r t r t
i ntegrated c ircuits d ivision cpc9909 2 www.ixysic.com r03 1. specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.4 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.6 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2. functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 led driver theory of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 input voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 current sense resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.5 current sense blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.6 enable/disable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.7 minimum off-time one-shot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.8 inductor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.9 gate output drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.10 linear dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.11 pwm dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.12 combination linear and pwm dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3. manufacturing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 moisture sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 esd sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.3 reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.4 board wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.5 mechanical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.6 packaging information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
i ntegrated c ircuits d ivision cpc9909 r03 www.ixysic.com 3 1. specifications 1.1 package pinout 1.2 pin description v in cs gnd gate r t ld v dd p w md 1 2 3 4 8 7 6 5 pin# name description 1 v i n input voltage 2cs led current sense input. internal current sense threshold is set at v cs(high) . the external sense resistor sets the maximum led current. 3 gnd device ground 4 gate external mosfet gate driver output 5pwmd low-frequency pwm dimming control input with internal pull-down resistor. 6 v dd regulated supply voltage output. requires a storage capacitor to gnd. can be overdriven by external voltage applied to v dd . 7ld linear dimming. apply a voltage less than v cs(high) to dim the led(s). 8 r t resistor to gnd sets the minimum off-time. ep - electrical and thermal conductive pad on the bottom of cpc9909ne. connect this pad to ground and provide sufficient thermal coupling to remove heat from the package.
i ntegrated c ircuits d ivision cpc9909 4 www.ixysic.com r03 1.3 absolute maximum ratings electrical absolute maximum ratings are at 25oc. absolute maximum ratings are stress ratings. stresses in excess of these ratings can cause permanent damage to the device. functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. parameter symbol maximum unit input voltage to gnd v i n -0.5 to +560 v inputs and outputs voltage to gnd cs, ld, pwmd, gate -0.3 to v dd +0.3 v v dd , externally applied v dd.ext 15 v power dissipation: soic-8 with thermal tab p d 2.5 w soic-8 w/o thermal tab 0.975 w junction temperature, operating t j -55 to +150 c operating temperature t a -55 to +85 c storage temperature t stg -55 to +150 c
i ntegrated c ircuits d ivision cpc9909 r03 www.ixysic.com 5 1.4 recommended oper ating conditions 1.5 electrical characteristics unless otherwise specified, all electr ical specifications are provided for t a =25 ? c. 1.6 thermal characteristics 1 use of a four-layer pcb can improve therma l dissipation (reference eia/jedec jesd51-5). parameter symbol minimum typical maximum unit input voltage range v i n 12 - 550 v dc pwmd frequency f pwmd - 500 - hz operating temperature t a -40 - +85 c parameter conditions symbol minimum typical maximum unit input input voltage range dc input voltage v in 8 - 550 v dc shut-down mode supply current v i n =8 to 550v, pwmd to gnd i in -0.30.6ma regulator voltage regulator output v i n =15v to 550v, i dd =0, i gate =0 v dd 7.2 7.8 8.4 v dc v dd current available for external circuitry - i dd --2ma v dd load regulation v i n =15v, i dd =1ma ? v dd - 150 200 mv pwm dimming pwmd input low voltage v i n =8v to 550v v pwmd(low) --0.5 v pwmd input high voltage v i n =8v to 550v v pwmd(high) 2.4 - - pwmd pull-down resistance - r pwmd 80 115 150 k ? current sense comparator current sense input current input low cs=0v i il -5 - 5 ? a input high cs=v dd i ih -5 0 5 current sense threshold voltage -40c < t a < 85c, v i n =15v to 550v v cs(high) 200 250 300 mv -55c < t a < -40c, v i n =15v to 550v 180 - 300 current sense blanking interval r t =400k ? t bla n k - 400 - ns delay from cs trip to gate low r t =400k ? t delay - 300 - ns minimum off-time one-shot minimum off-time r t =400k ? t off 6-8 ? s gate driver gate high output voltage i out =-10ma v gate(high) v dd -0.3 v dd -0.06 - v gate low output voltage i out =+10ma v gate(low) - 0.03 0.3 gate output rise time c gate =500pf t rise -16- ns gate output fall time c gate =500pf t fall -7- parameter package symbol minimum typical maximum unit thermal resistance, junction-to-ambient soic-8 with thermal pad (ne) 1 r ? ja -50- c/w soic-8 w/o thermal pad (n) - 128 -
i ntegrated c ircuits d ivision cpc9909 6 www.ixysic.com r03 2. functional description figure 1 typical a pplication circuit 2.1 overview the cpc9909 drives the leds via a minimum off-time, peak-current-limited, pulse-frequency modulation scheme. this c ontrol scheme is inherently stable, and the driver can be operated above a 50% duty cycle without any open-loop instability or sub-harmonic oscillations. since the switching frequency depends on the led load current, it results in a high efficiency operation. 2.2 led driver theory of operation the typical application circuit is as shown in figure 1 when pwmd is high, the control circuit is enabled and the gate driver turns on the external power mosfet (q1), causing the inductor (l1) current to ramp up until the voltage across the current sense resistor (r se n se ) exceeds v cs(high) . when the voltage at the cs pin exceeds this threshold, the gate driver turns q1 off. q1 remains off for the duration of the fixed minimum off-time. while the switch is off, the inductor continues to deliver the current to the load though the diode (d1). when the off-time expires, q1 turns on again until the peak current limit is reached, and the process repeats. the peak current limit threshold is set by the external sense resistor, r se n se , and the internal voltage threshold, v cs(high) . this internal voltage threshold can also be set externally via the ld pin. the lower of these two thresholds and r se n se set the peak current in the inductor. a soft start function can be implemented by ramping up the dc voltage at the ld pin from 0v to v cs(high) at the desired rate. to utilize the soft start function, connect a resistor divider from v dd to ground and a capacitor from the ld pin to ground, as shown in figure 2 soft-start circuit cpc9909 v oltage reg u lator v oltage reference q trig minim u m off-time one shot s r q - + - + v dd v in ld p w md gnd cs gate 8 - 550 v v dd r t r t r t r sense q1 d1 l1 b u ck config u ration c v dd cpc9909 v in cs gnd gate r t ld v dd p w md 51k 2.2k 0.1 f
i ntegrated c ircuits d ivision cpc9909 r03 www.ixysic.com 7 2.3 input voltage regulator the cpc9909 has an internal voltage regulator that can work with input voltages ranging from 12v dc to 550v dc . when a dc voltage greater than 12v is applied at the v i n pin, the internal voltage regulator regulates the voltage down to a typical 7.8v. the v dd pin is the internal voltage regulator output pin and must be bypassed by a low-esr capacitor to provide a low impedance path for high frequency switching noise. the cpc9909 driver does not require the bulky start-up resistors typically needed for off-line controllers. the internal voltage regulator provides sufficient voltage and current to power internal ic circuits. this voltage is also available at the v dd pin, and can be used as a bias voltage for external circuitry. the internal voltage regulator can be bypassed by applying an external dc voltage to the v dd pin that is slightly higher than the internally generated regulator voltage. this reduces the power dissipation of the integrated circuit, and it is more suitable in isolated applications where an auxiliary winding can be used to drive the v dd pin. the total input current drawn from the v i n pin is equal to the quiescent current drawn by the internal circuitry (which is specified at 0.6ma maximum) plus the gate driver current. see ?shut-down mode supply current? in section 1.5 ?electrical characteristics? on page 5 . the current draw of the gate driver depends on the switching frequency and the gate charge of the external power mosfet. the total input current can be calculated by: where q gate is the total gate charge of the mosfet and f s is the oscillator external frequency. 2.4 current s ense resistor the peak led current is set by an external sense resistor (r se n se ) connected from the cs pin to ground. the value of the current sense resistor is calculated based on the average led current desired, the current sense threshold, and the inductor ripple current. the peak-to-peak difference in the inductor current waveform is referred to as inductor ripple current (the inductor is typically selected to be large enough to keep this ripple within 30% of the average). factor in the ripple current when calculating the sense resistor. the current sense resistor value can be found by: where: ? v cs(high) = current sense threshold =0.25v (or v ld ) ? i led = average led/inductor current ? ? i l = inductor ripple current = 0.3*i led combining terms: 2.5 current sense blanking the cpc9909 has an internal current sense blanking circuit. when the power mosfet is turned on, the external inductor can cause an undesired spike at the current sense pin, initiating a premature termination of the gate pulse. to avoid this condition, a typical 400ns internal leading edge blanking time is implemented, thereby eliminating the need for external rc filtering, and simplifying the design. during the current sense blanking time, the current limit comparator is disabled, preventing the gate-drive circuit from terminating the gate-drive signal. 2.6 enable/disable function connecting the pwmd pin to v dd enables the gate driver. connecting pwmd to g n d disables the gate driver and sets the device in standby mode. in standby mode, the quiescent current is 0.6ma maximum. 2.7 minimum off-time one-shot the cpc9909 uses a fixed off-time control scheme. the minimum off-time is set by an external resistor connected between the rt and g n d terminals. the off-time can be determined by: off-time selection indirectly determines the switching frequency of the led driver. i in 0.6 ma q gate f s ? ?? + ? r sense v cs high ?? i led 0.5 ? i l + ---------------------------------- = r sense v cs high ?? 1.15 i led ? --------------------------- - = t off ? s ?? r t k ? ?? ?? 66 ? ?? 0.8 + ?? =
i ntegrated c ircuits d ivision cpc9909 8 www.ixysic.com r03 the switching frequency is determined by: where: ? d = duty cycle ? t off = off-time in general, switching frequency selection is based on the inductor size, controller power dissipation, and the input filter capacitor. the typical off-line led driver switching frequency, f s , is between 30 khz and 120 khz. this operating range gives the designer a reasonable compromise between switching losses and inductor size. the internal off-time one-shot has an accuracy of 20%. the figure below shows the r t resistor selection for the desired off-time. 2.8 inductor design the inductor value is defined by the led/inductor ripple current, minimum off time, and the output voltage. the minimum off time is determined by the duty cycle and switching frequency. the duty cycle is given by: where: ? v ledstring is the led string voltage at the desired average led current. ? v in(min) is the minimum dc input voltage. the minimum inductor value for a given ripple current is: where: ? ? i l = ripple current the inductor peak current is given by: 2.9 gate output drive the cpc9909 uses an internal gate drive circuit to turn on and off an external power mosfet. the gate driver can drive a variety of mosfets. for a typical off-line application, the total mosfet gate charge will be less than 25nc. f s 1 d ? t off ------------ - = r t v s off-time 0 5 10 15 20 25 30 35 40 45 0 500 1000 1500 2000 2500 3000 r t (k ) t off ( u s) t off ( s) d v ledstring v in min ?? ------------------------- - = l min v ledstring ? i l -------------------------- t off ? = i lpeak i led 0.5 ? i l + =
i ntegrated c ircuits d ivision cpc9909 r03 www.ixysic.com 9 2.10 linear dimming a linear dimming function can be implemented by applying a dc control voltage to the ld pin. by varying this voltage from 0v to v cs(high) , the user can adjust the current level in the leds which in turn will increase or decrease the light intensity. the control voltage to the ld pin can be generated from an external voltage divider network from v dd . this function is useful if the user requires led current of a particular level, and there is no exact r t value available. n ote that applying a voltage higher than the current sense threshold voltage to the ld pin will not change the output current due to the fixed internal threshold setting. when the ld pin is not used, it should be connected to v dd . figure 3 typical linear di mming application circuit 2.11 pwm dimming pulse width modulation dimming can be implemented by driving the pwmd pin with a low frequency square wave signal in the range of a few hundred hertz. the pwmd signal controls the led brightness by gating the pwm gate driver output pin gate. the signal can be generated by a microcontroller or a pulse generator with a duty cycle proportional to the amount of desired light output. figure 4 buck driver for pwm dimming applicat ion circuit 2.12 combination line ar and pwm dimming a combination of linear and pwm dimming techniques can be used to achieve a large dimming ratio. hb leds 350ma d1 by v 26b c1 0.1 f 400 v c1 22 f 400 v r1 402k l1 4.7mh r4 0.56 r2 51k ra1 5.0k c1 2.2 f 16 v c1 0.1 f 25 v ac ac + - br1 f u se f2 2a ntc1 cpc9909 v in cs gnd gate r t ld v dd p w md ixta 8 n50p ld monitor ac inp u t 90 - 265 v rms hb leds 900ma max asmt-mx00 d1 schottky 40 v 0.1 f 50 v 402k 220 h r1 0.27 10 f 50 v cpc9909 v in cs gnd gate r t ld v dd p w md q1 v in 12 - 30 v dc p w m cpc1001n* *optional isolation
i ntegrated c ircuits d ivision cpc9909 10 www.ixysic.com r03 3. manufacturing information 3.1 moisture sensitivity all plastic encapsulated semiconductor packages are susc eptible to moisture ingression. ixys integrated circuits division clas sified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, ipc/jedec j-std-020 , in force at the time of product evaluation. we test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. failure to adhere to the warnings or limitations as establ ished by the listed specificati ons could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. this product carries a moisture sensitivity level (msl) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard ipc/jedec j-std-033 . 3.2 esd sensitivity this product is esd sensitive , and should be handled according to the industry standard jesd-625 . 3.3 reflow profile this product has a maximum body temperature and time rating as shown below. all other guidelines of j-std-020 must be observed. 3.4 board wash ixys integrated circuits division recommends the use of no-clean flux formulations. however, board washing to remove flux residue is acceptable, and the use of a short drying bake may be necessary. chlorine-based or fluorine-based solvents or fluxes should not be used. clean ing methods that employ ultrasonic energy should not be used. device moisture sensitivity level (msl) rating cpc9909n / cpc9909ne msl 1 device maximum temperature x time cpc9909n / cpc9909ne 260c for 30 seconds e 3 pb
i ntegrated c ircuits d ivision cpc9909 r03 www.ixysic.com 11 3.5 mechanical dimensions 3.5.1 8-pin soic package 3.5.2 8-pin soic ep package note: thermal pad should be electrically connected to g n d, pin 3. dimensions mm (inches) pcb land pattern pin 1 pin 8 3.937 0.254 (0.155 0.010) 5.994 0.254 (0.236 0.010) 0.406 0.076 (0.016 0.003) 4.92 8 0.254 (0.194 0.010) 1.270 ref (0.050) 1.346 0.076 (0.053 0.003) 0.051 min - 0.254 max (0.002 min - 0.010 max) 0.559 0.254 (0.022 0.010) 0.762 0.254 (0.030 0.010) 1.27 (0.050) 5.40 (0.213) 1.55 (0.061) 0.60 (0.024) recommended pcb land pattern dimensions mm (inches) 1.346 0.076 (0.053 0.003) 0.051 min - 0.254 max (0.002 min - 0.010 max) 4.92 8 0.254 (0.194 0.010) pin 1 0.406 0.076 (0.016 0.003) 5.994 0.254 (0.236 0.010) 3.937 0.254 (0.155 0.010) 1.270 ref (0.050) 0.762 0.254 (0.030 0.010) 7o 2.540 0.254 (0.100 0.010) 3.556 0.254 (0.140 0.010) 1.27 (0.050) 5.40 (0.209) 1.55 (0.061) 0.60 (0.024) 2.75 (0.10 8 ) 3. 8 0 (0.150)
i ntegrated c ircuits d ivision cpc9909 12 www.ixysic.com r03 3.6 packaging information for both the soic-8 and the soic-8 ep packages. dimensions mm (inches) note: tape dimensions not sho w n comply w ith jedec standard eia-4 8 1-2 em b ossment em b ossed carrier top co v er tape thickness 0.102 max. (0.004 max.) 330.2 dia. (13.00 dia.) k 0 = 2.10 (0.0 8 3) w =12.00 (0.472) b 0 =5.30 (0.209) user direction of feed a 0 =6.50 (0.256) p= 8 .00 (0.315) for additional information please visit www.ixysic.com ixys integrated circuits division makes no representations or warranties with respect to the accuracy or completeness of the co ntents of this publication and reserves the right to make changes to s pecifications and product descriptions at an y time without notice. neither circuit paten t licenses or indemnity are expressed or implied. except as set forth in ixys integrated circuits division?s standard terms and conditions of sale, ixys integrated c ircuits division assumes no liability whatsoever, and disclaims any express or implied warranty relati ng to its products, including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. the products described in this document are not designed, intended, authorized, or warranted for use as components in systems i ntended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of ixys integrated circuits divisi on?s product may result in direct physical harm, injury, or death to a person or severe property or enviro nmental damage. ixys integrated circuits division reserves the r ight to discontinue or make changes to its products at any time without notice. specifications: ds-cpc9909-r03 ? copyright 2012, ixys integrated circuits division all rights reserved. printed in usa. 12/18/2012

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